Module Review
- AccumulatorA register that stores intermediate results of arithmetic and logical operations.: A register that stores intermediate results of arithmetic and logical operations.
- Arithmetic Logic Unit (ALU)The CPU component that performs arithmetic (e.g., addition, subtraction) and logical operations (e.g., AND, OR).: The CPU component that performs arithmetic (e.g., addition, subtraction) and logical operations (e.g., AND, OR).
- BusA communication pathway that transfers data and instructions between the CPU, memory, and input/output devices.: A communication pathway that transfers data and instructions between the CPU, memoryA unified system that stores both data and program instructions in the same location., and input/output devices.
- Cache Hit Rate: The percentage of times the CPU finds the required data in the cache without needing to access the slower main memory. A higher cache hit rate improves performance.
- Cache Levels: The different layers of cache in modern CPUs. Smaller, faster caches (L1 and L2) storeThe stage where the CPU saves the result of the execution back into memory or registers. critical data, while the larger L3 cache stores additional data shared across cores.
- Cache: A small, high-speed memory inside the CPU that stores frequently used data for quick access, reducing delays from accessing RAM.
- Central Processing Unit (CPU): The main component of a computer. It processes data and instructions and controls the computer system.
- Clock Speed: The clock speed, measured in Hertz (Hz), represents the number of cycles a CPU can executeThe stage where the CPU carries out the operation specified by the instruction. per second. Each cycle is a basic unit of work carried out by the CPU.
- Computer System: A combination of hardwareThe physical components of a computer, such as the CPU, memory, and input/output devices. and softwareThe programs and operating systems that run on a computer to perform specific tasks. that processes data and performs tasks.
- Control Unit (CU)The CPU component responsible for managing and coordinating the fetch-execute cycle. It directs data flow within the CPU.: The CPU component responsible for managing and coordinating the fetch-execute cycle. It directs data flow within the CPU.
- Core Management: The operating system’s ability to efficiently distribute tasks across multiple cores to maximise performance.
- Data Access Speed: The speed at which the CPU retrieves data from its cache. A larger cache reduces the time needed to fetchThe stage where the CPU retrieves an instruction from memory. data from slower main memory, improving performance.
- DecodeThe stage where the CPU interprets the instruction using the Control Unit (CU).: The stage where the CPU interprets the instructionA command that tells the CPU what operation to perform. using the Control Unit (CU).
- Embedded System: A dedicated computing system integrated into a larger device or machinery to perform specific tasks or functions.
- Execute: The stage where the CPU carries out the operation specified by the instruction.
- Fetch-Execute Cycle: The continuous process of retrieving, decoding, executing, and storing instructions.
- Fetch: The stage where the CPU retrieves an instruction from memory.
- Hardware: The physical components of a computer, such as the CPU, memory, and input/output devices.
- Input DevicesDevices such as keyboards, mice, or controllers that send data into a computer.: Devices such as keyboards, mice, or controllers that send data into a computer.
- Instruction: A command that tells the CPU what operation to perform.
- Memory Address Register (MAR)A register that holds the memory address of the data or instruction being fetched or stored.: A register that holds the memory address of the data or instruction being fetched or stored.
- Memory Data Register (MDR)A register that holds the actual data or instruction that has been fetched from or is being written into memory.: A register that holds the actual data or instruction that has been fetched from or is being written into memory.
- Memory: A unified system that stores both data and program instructions in the same location.
- Multi-Core: A multi-core processor is a CPU with two or more independent processing units (cores) that can execute multiple tasks simultaneously.
- Output DeviceA device such as a monitor or speaker that displays or transmits processed data to the user.: A device such as a monitor or speaker that displays or transmits processed data to the user.
- Parallelism: The ability of multi-core CPUs to execute multiple tasks in parallel, improving performance for applications that utilise multiple cores.
- Program Counter (PC)A register that holds the memory address of the next instruction to be fetched.: A register that holds the memory address of the next instruction to be fetched.
- Random Access Memory (RAM)The main memory that temporarily stores data and instructions currently in use by the CPU.: The main memory that temporarily stores data and instructions currently in use by the CPU.
- RegistersSmall, high-speed storage units within the CPU that temporarily hold data during processing.: Small, high-speed storage units within the CPU that temporarily hold data during processing.
- Single-Core: A single-core processor is a CPU that has only one processing unit (core) capable of executing tasks. This means that it can only process one instruction at a time.
- Software: The programs and operating systems that run on a computer to perform specific tasks.
- Store: The stage where the CPU saves the result of the execution back into memory or registers.
- Thread: The smallest unit of execution within a process, allowing programs to perform multiple operations simultaneously.
- Threaded: Threading refers to the process of dividing a program or task into smaller execution units called threads, which can run independently or in parallel within a CPU.
- Von Neumann Architecture: A computer architecture model where data and instructions are stored in the same memory, accessed sequentially.
- Workload Dependency: The fact that different tasks benefit differently from clock speed, cache size, and core count. Some workloads require more cores, while others benefit from higher clock speeds.
